The LMK0482x family is the industrys highest performance clock conditioner with JEDEC JESD204B support. The 14 clock outputs from PLL2 can be configured to drive seven JESD204B converters or other logic devices, using device and SYSREF clocks. SYSREF can be provided using both DC and AC coupling. Not limited to JESD204B applications, each of the 14 outputs can be individually configured as high-performance outputs for traditional clocking systems. The high performance, combined with features such as the ability to trade off between power or performance, dual VCOs, dynamic digital delay, holdover, and glitchless analog delay, make the LMK0482x family ideal for providing flexible high-performance clocking trees.
全部替代型号
查看完整报告技术参数
| 电源 | |
|---|---|
| Number of input channels | 3 |
| 交流 / 直流特性 | |
| Output frequency (max) (MHz) | 3080 |
| Output frequency (min) (MHz) | 0.289 |
| 环境与封装 | |
| Operating temperature range (°C) | -40 to 85 |
| 其他 | |
| Features | JESD204B |
| Input type | LVCMOS, LVDS, LVPECL |
| Number of outputs | 15 |
| Output type | LVCMOS, LVDS, LVPECL |
| RMS jitter (fs) | 88 |