Microchip Technology

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驱动器,接收器,收发器

PHY TRANSCEIVER 10/100BASE-TX RMII 24-QFN

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单二极管

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存储器

1Kb 兼容I2C的双线串行EEPROM存储器

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单二极管

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单二极管

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配电开关,负载驱动器

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通用/未分类集成电路

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单个双极晶体管

Small Signal Transistor (PNP)

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微控制器、微处理器及片上系统

<p>The high-performance Microchip picoPower® AVR® RISC-based CMOS 8-bit microcontroller combines 2 KB ISP Flash memory, 128B EEPROM, 128B SRAM, six general purpose I/O lines, 32 general purpose working registers, one 8-bit timer/counter with compare modes, one 8-bit high-speed timer/counter, universal serial interface (USI), internal and external interrupts, 4-channel 10-bit A/D converter, programmable watchdog timer with internal oscillator, and three software selectable power saving modes. The device operates between 2.7-5.5 volts. By executing powerful instructions in a single clock cycle, the device achieves throughputs approaching one MIPS per MHz, balancing power consumption and processor speed.</p><p><strong>Functional Safety</strong>:</p><p> This product is recommended for <a href="https://www.microchip.com/en-us/products/microcontrollers-and-microprocessors/8-bit-mcus/functional-safety" rel="noopener noreferrer" target="_blank">safety critical applications</a> targeting industrial and automotive products (IEC 61508 and ISO 26262). Necessary documentation, such as the FMEDA report, can be provided on request. Contact your local Microchip sales office or your distributor for more information.</p>

数据手册52查看详情
驱动器,接收器,收发器

<p>The KSZ9031 is a completely integrated triple-speed (10Base-T/100Base-TX/1000Base-T) Ethernet physical-layer transceiver for transmission and reception of data on standard CAT-5 unshielded twisted pair (UTP) cable.</p><p>The KSZ9031MNX offers the industry-standard GMII/MII (Gigabit Media Independent Interface/Media Independent Interface) for connection to GMII/MII MACs in Gigabit Ethernet processors and switches for data transfer at 1000Mbps or 10/100Mbps. The KSZ9031RNX provides the reduced gigabit media independent interface (RGMII).</p><p>The KSZ9031 reduces board cost and simplifies board layout by using on-chip termination resistors for the four differential pairs and by integrating an LDO controller to drive a low-cost MOSFET to supply the 1.2V core. The KSZ9031 offers diagnostic features to facilitate system bring-up and debugging in production testing and in product deployment. Parametric NAND tree support enables fault detection between KSZ9031 I/Os and the board. The LinkMD<sup>®</sup> TDR-based cable diagnostic identifies faulty copper cabling. Remote and local loopback functions verify analog and digital data paths.</p><p>The standard KSZ9031RNX is available in the 48-pin, lead-free QFN package, and the AEC-Q100 automotive qualified parts, KSZ9031RNXUB-VAO and KSZ9031RNXVB-VAO, are available in the 48-pin lead-free WQFN package. The KSZ9031MNX is available in a 64-pin, lead-free QFN package.</p><p><br></p><p>Microchip's complimentary and confidential <a href="https://www.microchip.com/en-us/support/design-help/design-check-services" rel="noopener noreferrer" target="_blank" style="color: rgb(28, 53, 94);">MicroCHECK</a> design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's <a href="https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions" rel="noopener noreferrer" target="_blank" style="color: rgb(28, 53, 94);">Program Terms and Conditions</a> and requires a myMicrochip account.</p>

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驱动器,接收器,收发器

<p>The KSZ9897 is a fully integrated layer 2, managed, seven-port gigabit Ethernet switch with numerous advanced features. Five of the seven ports incorporate 10/100/1000 Mbps PHYs. The other two ports have interfaces that can be configured as SGMII, RGMII, MII or RMII. Either of these may connect directly to a host processor or to an external PHY.</p><p>Full register access is available by SPI or I<span style="color: rgba(0, 0, 0, 0.8);">²</span>C interfaces, and by optional in-band management via any of the data ports. PHY register access is provided by a MIIM interface.</p><p>Security features include support for IEEE 802.1X port-based authentication and Access Control List (ACL) filtering.</p><p>An assortment of power-management features including Energy-Efficient Ethernet (EEE) have been designed in to satisfy energy efficient environments. </p><p>Software support is provided through Linux DSA and the Microchip GitHub. Looking for a Linux<sup>®</sup> Host Processor, try the <a href="https://www.microchip.com/en-us/products/microcontrollers-and-microprocessors/32-bit-mpus/sama5/sama5d3-series" rel="noopener noreferrer" target="_blank">SAMA5D3</a>.</p><p><br></p><p>Microchip's complimentary and confidential <a href="https://www.microchip.com/en-us/support/design-help/design-check-services" rel="noopener noreferrer" target="_blank" style="color: rgb(28, 53, 94);">MicroCHECK</a> design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's <a href="https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions" rel="noopener noreferrer" target="_blank" style="color: rgb(28, 53, 94);">Program Terms and Conditions</a> and requires a myMicrochip account.</p>

数据手册16查看详情
驱动器,接收器,收发器

<p>The KSZ8895MQX/RQX/FQX/ML is a highly-integrated, Layer 2 managed, five-port switch with numerous features designed to reduce system cost. The KSZ8895 is Automotive qualified (AEC-Q100). </p><p>The KSZ8895 family was designed to be used in for cost sensitive 10/100Mbps five-port switch systems with low power requirements. Combining on-chip termination and internal LDO regulator help minimize system cost. The KSZ8895 family supports high-performance memory bandwidth and shared memory-based switch fabric with non-blocking configuration. </p><p>The KSZ8895 family also includes an extensive feature set, including: power management, programmable rate limit and priority ratio, tag/port-based VLAN, packets filtering, four queue QoS prioritization, management interfaces, and MIB counters.</p><p>The KSZ8895 family provides multiple CPU data interfaces to effectively address both current and emerging fast Ethernet applications when port 5 is configured to separate MAC5 with SW5-MII/RMII and PHY5 with P5-MII/RMII interfaces.</p><p>The KSZ8895 family offers three configurations, providing the flexibility to meet different requirements:</p><ul><li>KSZ8895MQX/ML has 5 10/100Base-T/TX transceivers, 1 SW5-MII and 1 P5-MII interface</li><li>KSZ8895RQX has 5 10/100Base-T/TX transceivers, 1 SW5-RMII and 1 P5-RMII interface</li><li>KSZ8895FQX has 4 10/100Base-T/TX transceivers on Ports 1, 2, 3 and 5 (port 3 can be set to the fiber mode). 1 100Base-FX transceivers on Port 4. 1 SW5-MII and 1 P5-MII interface</li></ul><p>All registers of MACs and PHYs units can be managed by the SPI or the SMI interface. MIIM registers can be accessed through the MDC/MDIO interface. </p><p>EEPROM can set all control registers for the unmanaged mode. KSZ8895MQX/RQX/FQX are 128-pin PQFP package. KSZ8895ML is 128-pin LQFP package.</p><p><br></p><p>Microchip's complimentary and confidential <a href="https://www.microchip.com/en-us/support/design-help/design-check-services" rel="noopener noreferrer" target="_blank" style="color: rgb(28, 53, 94);">MicroCHECK</a> design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's <a href="https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions" rel="noopener noreferrer" target="_blank" style="color: rgb(28, 53, 94);">Program Terms and Conditions</a> and requires a myMicrochip account.</p><p><br></p><p><strong>**Please note: KSZ8895 part numbers ending/containing "A" are not recommended for new designs as there is a newer version. However, both versions will continue to be supported.**</strong></p><ul><li><strong>KSZ8895RQXIA >> KSZ8895RQXI</strong></li><li><strong>KSZ8895FQXCA >> KSZ8895FQXC</strong></li><li><strong>KSZ8895MQXCA >>KSZ8895MQXC</strong></li><li><strong>KSZ8895FQXIA >> KSZ8895FQXI</strong></li><li><strong>KSZ8895RQXCA >>KSZ8895RQXC</strong></li><li><strong>KSZ8895MQXIA >>KSZ8895MQXI</strong></li></ul><p><br></p>

数据手册12查看详情
驱动器,接收器,收发器

<p>The KSZ9896 is a fully integrated layer 2, managed, six-port gigabit Ethernet switch with numerous advanced features. Five of the six ports incorporate 10/100/1000 Mbps PHYs. The sixth port has a MAC interface that can be configured as GMII, RGMII, MII or RMII. </p><p>Full register access is available by SPI or I<span style="color: rgba(0, 0, 0, 0.8);">²</span>C interfaces, and by optional in-band management via any of the data ports. PHY register access is provided by a MIIM interface.</p><p>Security features include support for IEEE 802.1X port-based authentication and Access Control List (ACL) filtering.</p><p>An assortment of power-management features including Energy-Efficient Ethernet (EEE) have been designed in to satisfy energy efficient environments.</p><p><br></p><p>Microchip's complimentary and confidential <a href="https://www.microchip.com/en-us/support/design-help/design-check-services" rel="noopener noreferrer" target="_blank" style="color: rgb(28, 53, 94);">MicroCHECK</a> design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's <a href="https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions" rel="noopener noreferrer" target="_blank" style="color: rgb(28, 53, 94);">Program Terms and Conditions</a> and requires a myMicrochip account.</p>

数据手册11查看详情
驱动器,接收器,收发器

<p>The Microchip ATA663254 system basis chip is a fully integrated LIN transceiver, designed according to the LIN specification 2.0, 2.1, 2.2, 2.2A and SAEJ2602-2, with a low-drop voltage regulator with 5V/85mA. The combination of voltage regulator and bus transceiver makes it possible to develop simple but powerful slave nodes in LIN bus systems. Microchip ATA663254 is designed to handle the low-speed data communication in vehicles (for example, in convenience electronics). Improved slope control at the LIN driver ensures secure data communication up to 20Kbaud. The bus output is designed to withstand high voltage. Sleep mode and silent mode guarantee minimized current consumption even in the case of a floating or a shorted LIN bus. The voltage regulator is a fully integrated low-drop regulator working down to a supply voltage of 2.3V with best-in-class current consumption in linear mode (2V<V<sub>VS</sub><5V) with less than 170µA. This enables storing data within the MCU during system shutdown even in case of an unexpected power supply interruption. The device is available in SO8 and DFN8 package with wettable flanks and pin assignment according to OEM hardware requirements for LIN-, CAN-, and Flexray- interfaces, rev. 1.3.</p><p>Please see our MikroElektronika click Board! <a href="https://www.mikroe.com/ata663254-click" rel="noopener noreferrer" target="_blank">https://www.mikroe.com/ata663254-click</a></p>

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缓冲器,驱动器,接收器,收发器

The Le88241 Tracking Battery ABS (Automatic Battery Switching) VoicePort device implements a dual-channel telephone line interface by providing all the necessary voice interface functions from the high voltage subscriber line to the µP/DSP digital interface. The ABS device can operate from external battery supplies, or from supplies generated by the on chip switching regulator controllers. This device reduces system level cost, space, and power by achieving the highest level of voice integration possible. Designers benefit by having a simple, cost effective, low power and dense, interface design without sacrificing features or functionality. The programmable, feature rich VoicePort devices provide a highly functional line interface which meets the requirements of short and medium loop (up to 1500 Ohms total at 1 REN) applications. Features include: high voltage switching regulator, self-test, line test capabilities, integrated ringing (up to 110-Vpk), worldwide software programmability, flexible signal generator with tone cadencing, caller ID generation and all BORSCHT functions. These VoicePort device features are crucial for designing cost-effective, full-featured Voice over Broadband solutions.

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麦克风

The MCP6546 is an Open-Drain, single comparator. This single-ended device operates from 1.6V to 5.5V, with typical quiescent current of 600 nA and a maximum of 1 microamp and is 10V output capable. This device is offered in the eight lead PDIP, SOIC, MSOP and five lead SOT-23 package. AEC-Q100 Grade 1 qualification is available for this device

数据手册12查看详情
麦克风

The MCP6V7x family of operational amplifiers provides input offset voltage correction for very low offset and offset drift. These devices provide a gain bandwidth product of 2 MHz, are unity gain stable, have no 1/f noise, and provide superior CMRR and PSRR performance. These products operate with a single supply voltage as low as 2.0V with a maximum quiescent current of only 260 uA.

数据手册8查看详情
麦克风

The MCP6V6x family of operational amplifiers provides input offset voltage correction for very low offset and offset drift. These devices provide a gain bandwidth product of 1 MHz, are unity gain stable, have no 1/f noise, and provide superior CMRR and PSRR performance. These products operate with a single supply voltage as low as 1.8V with a maximum quiescent current of only 130 uA.

数据手册8查看详情
麦克风

The MCP6V86/6U/7/9 family of operational amplifiers provides input offset voltage correction for very low offset and offset drift. These devices provide a gain bandwidth product of 5 MHz, are unity gain stable, have no 1/f noise, and provide superior CMRR and PSRR performance. These products operate with a single supply voltage as low as 2.2V with a maximum quiescent current of only 770 uA per channel.

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麦克风

<p>The MCP6486/6R/6U/7/9 series of operational amplifiers have low input bias current and rail-to-rail input and output operation. This family is unity gain stable and has a gain bandwidth product of 10 MHz (typical). These devices operate with a single-supply voltage as low as 1.8V, while only drawing 550 µA/amplifier (typical) of quiescent current. All devices feature integrated EMI filtering and are fully specified over the extended temperature range from -40°C to +125°C.</p>

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