CMOS Dual J-K Master-Slave Flip-Flop
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| 环境与封装 | |
|---|---|
| Moisture Sensitivity Level (MSL) | Not Applicable |
| Pkg. Dimensions (mm) | 10.4 x 6.9 x 0.00 |
| Qualification Level | QML Class V (space) |
| Temp. Range (°C) | -55 to +125°C |
| 其他 | |
| Carrier Type | Tray |
| DLA SMD | 5962R9662901VXC |
| DSEE (MeV·cm2/mg) | 75 |
| Lead Count (#) | 16 |
| Length (mm) | 10.4 |
| MOQ | 25 |
| Pb Free Category | Gold Plate over compliant Undercoat-e4 |
| Pb (Lead) Free | Exempt |
| Pitch (mm) | 1.3 |
| Pkg. Type | CFP |
| Rating | Space |
| TID HDR (krad(Si)) | 100 |
| TID LDR (krad(Si)) | ELDRS free |
| Width (mm) | 6.9 |