XilinxUnited States

XC95144XL-7TQ144C

CPLDs (Complex Programmable Logic Devices)144-pin Thin Quad Flat Pack

CPLD 144 MACROCELL 3.3V 144-TQFP

XC95144XL-7TQ144C is a 3.3V high-performance CPLD with 144 macrocells, 117 user I/Os, in a 144-pin TQFP package, commercial temperature range 0 to 70°C, featuring 5V tolerant I/Os and JTAG boundary scan.Checked against the datasheet

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Technical parameters

Key specs

Logic elements144

I/O count117

Core voltage3 ~ 3.6 VMax 3.6 V (Commercial TA = 0°C to 70°C)

Datasheet-verified parameters

27 items

Parameter	Value and test conditions	Source
Macrocells	144 macrocells
User I/O pins	117 user I/O pins
Supply voltage for internal logic and input buffers	Min 3.0 V, Max 3.6 V (Commercial TA = 0°C to 70°C)
Package Type	144-pin Thin Quad Flat Pack (TQFP)
Operating Temperature Range	Commercial: TA = 0°C to +70°C
Operating Range Grade	C (Commercial)
Pin-to-pin logic delay	7.5 ns
Usable gates	3,200 usable gates
System frequency	Up to 178 MHz
I/O voltage tolerance	5V tolerant I/O pins accept 5V, 3.3V, and 2.5V signals
Supply voltage for output drivers for 3.3V operation	Min 3.0 V, Max 3.6 V
Supply voltage for output drivers for 2.5V operation	Min 2.3 V, Max 2.7 V
Low-level input voltage	Min 0 V, Max 0.80 V
High-level input voltage	Min 2.0 V, Max 5.5 V
Output high voltage for 3.3V outputs	Min 2.4 V (IOH = -4.0 mA)
Output low voltage for 3.3V outputs	Max 0.4 V (IOL = 8.0 mA)
Input leakage current	Max ±10 μA (VCC = Max; VIN = GND or VCC)
I/O capacitance	Max 10 pF (VIN = GND; f = 1.0 MHz)
Operating supply current	45 mA (Typical) (Low power mode, active; VIN = GND, No load; f = 1.0 MHz)
Absolute Maximum Rating - Supply voltage	-0.5 to 4.0 V
Absolute Maximum Rating - Input voltage	-0.5 to 5.5 V
Storage temperature	-65 to +150 °C
Junction temperature	+150 °C
Data Retention	20 Years
Program/Erase Cycles	10,000 Cycles
Electrostatic Discharge (ESD)	2,000 Volts
Programming temperature range	TA = 0°C to +70°C

All parameters (9)ExpandCollapse

AC and DC characteristics
Pin-to-Pin Logic Delays	5 ns
System Frequency	up to 178 MHz
Environment and package
Package	144-pin TQFP
Storage Temperature	-65 to +150 °C
Other
Macrocells	144
Usable Gates	3,200
User I/O Pins	117
VCCINT	3.0 to 3.6 V
VCCIO	3.0 to 3.6 V

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DatasheetDatasheet · 204.8 KB · 2026-10-29

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