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Technical parameters

Key specs

Logic elements36
I/O count34
Core voltage4.5 ~ 5.5 VMax 5.5 V (Industrial TA = -40°C to +85°C)

Datasheet-verified parameters

21 items
ParameterValue and test conditionsSource
Macrocells36 macrocells with 800 usable gates
User I/O pinsUp to 34 user I/O pins
Package44-pin Very Thin Quad Flat Pack (VQFP)
Operating TemperatureIndustrial TA = -40°C to +85°C
Operating Range GradeI (Industrial)
Supply voltage for internal logic and input buffersMin 4.5 V, Max 5.5 V (Industrial TA = -40°C to +85°C)
Recommended Operating ConditionsVCCINT: 4.5-5.5 V; VCCIO (5V): 4.5-5.5 V; VCCIO (3.3V): 3.0-3.6 V; TA: -40°C to +85°C
Absolute Maximum RatingsVCC: -0.5 to 7.0 V; VIN: -0.5 to VCC+0.5 V; TSTG: -65 to +150 °C; TJ: +150 °C
Pin-to-pin delay15 ns
Maximum Counter Frequency100 MHz
Output high voltage for 5V outputsMin 2.4 V (IOH = -4.0 mA, VCC = Min)
Output low voltage for 5V outputsMax 0.5 V (IOL = 24 mA, VCC = Min)
Input leakage currentMax ±10 μA (VCC = Max, VIN = GND or VCC)
I/O capacitanceMax 10 pF (VIN = GND, f = 1.0 MHz)
Operating supply current (low power mode, active)Typ 30 mA (VI = GND, No load, f = 1.0 MHz)
Data RetentionMin 20 Years
Program/Erase Cycles (Endurance)Min 10,000 Cycles
High-drive output current24 mA
I/O voltage capability3.3V or 5V
In-system programmable5V in-system programmable
Boundary-scan supportExtensive IEEE Std 1149.1 boundary-scan (JTAG) support
All parameters (10)ExpandCollapse
Power
Output Drive Current24 mA
AC and DC characteristics
Pin-to-Pin Logic Delays5 ns
Environment and package
Package44-pin VQFP
Other
f CNT100 MHz
Macrocells36
Program/Erase Cycles (Endurance)10,000 Cycles
Usable Gates800
User I/O PinsUp to 34
V CCINT (Industrial)4.5 to 5.5 V
V CCIO (5V operation, Industrial)4.5 to 5.5 V

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