Clock Generators, PLLs, Frequency Synthesizers

CLOCK GEN 10-OUT 712.5MHZ 100HZ-712.5MHZ QFN

IC BLUETOOTH SERIAL PORT MODULE 60FBGA

YXW9361型 2T2RSDR 射频收发器为高性能、高集成度的射频收发器，与 AD9361 原片 pin to pin 兼容，无需更改外围电路直接替换。器件良好的可编程性和宽带能力使其可以应 用于通信、电台、数据链等多种射频收发系统应用中。该器件实现了射频、频率合成器、 AD&DA 以及混合信号基带全集成，为处理器提供可配置的数字接口，大幅简化系统设计。 YXW9361覆盖 70 MHz 至 6.0GHz 的工作频率范围，支持信号带宽 200 kHz 至 56 MHz 可调。

I2C Programmable Any-Frequency CMOS Clock Generator

FemtoClock® Zero Delay Buffer/Clock Generator For PCI Express® And Ethernet

The ADF4156 is a 6.2 GHz fractional-N frequency synthesizer that implements local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a ∑­∆ based fractional interpolator to allow programmable fractional-N division. The INT, FRAC, and MOD registers define an overall N divider (N = (INT + (FRAC/MOD))). The RF output phase is programmable for applications that require a particular phase relationship between the output and the reference. The ADF4156 also features cycle slip reduction circuitry, leading to faster lock times without the need for modifications to the loop filter. Control of all on-chip registers is via a simple 3-wire interface. The device operates with a power supply ranging from 2.7 V to 3.3 V and can be powered down when not in use. Applications CATV equipment Base stations for mobile radio (WiMAX, GSM, PCS, DCS, SuperCell 3G, CDMA, WCDMA) Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA) Wireless LANs, PMR Communications test equipment

The HMC703 fractional synthesizer is built upon the high performance PLL platform also contained in the HMC704 and Hittite’s latest generation of PLL+VCO products. This platform has the best phase-noise and spurious performance in the industry - enabling higher order modulation schemes while minimizing blocker effects in high performance radios. In addition, the HMC703 offers frequency sweep and modulation features, external triggering, double-buffering, exact frequency control, phase modulation and more - while maintaining pin compatibility for the main functions with the HMC700. Applications Microwave Point-to-Point Radios Base Stations for Mobile Radio (GSM, PCS, DCS, CDMA, WCDMA) Wireless LANs, WiMAX Communications Test Equipment ATV Equipment Automotive Sensors AESA - Phased Arrays FMCW Radar Systems

The HMC988LP3E is a an ultra low noise clock divider capable of dividing by 1/2/4/8/16/32. It is a versatile device with additional functionality including adjustable output phase, adjustable delay in 60 steps of ~ 20 ps, a clock synchronization function, and a clock invert option. Housed in a compact 3 × 3 mm SMT QFN package, the clock divider offers a high level of functionality. The device works with 3.3V supply or may be connected to 5V supply and utilize the optional on-chip regulator. This on-chip regulator may be bypassed. Up to 8 addressable HMC988LP3E devices can be used together on the SPI bus. The HMC988LP3E is ideally suited for data converter applications with extremely low phase noise requirements. APPLICATIONS Basestation Digital Pre-Distortion Paths (DPD) High Performance Automated Test Equipment (ATE) Backplane Clock Skew Management Phase Coherence of Multiple Clock Paths Clock Delay Management ton Improve Setup & Hold Time Margins PCB Signal Flight Time Offset Circuits Track and Hold Circuits for ADC/DACs

The ADF4157 is a 6 GHz fractional-N frequency synthesizer with a 25-bit fixed modulus, allowing subhertz frequency resolution at 6 GHz. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a Σ-Δ based fractional interpolator to allow programmable fractional-N division. The INT and FRAC values define an overall N divider, N = INT + (FRAC/225). The ADF4157 features cycle slip reduction circuitry, which leads to faster lock times without the need for modifications to the loop filter. Control of all on-chip registers is via a simple 3-wire interface. The device operates with a power supply ranging from 2.7 V to 3.3 V and can be powered down when not in use. Applications Satellite communications terminals, radar equipment Instrumentation equipment Personal mobile radio (PMR) Base stations for mobile radio Wireless handsets

The HMC704 has been designed for the best phase noise and lowest spurious content possible in an integrated synthesizer. Fabricated in a SiGe BiCMOS process, this Fractional-N frequency synthesizer consists of a very low noise digital phase detector, VCO divider, reference divider and a precision controlled charge pump. Ultra low in-close phase noise and low spurious allows wide loop bandwidths for faster frequency hopping and low micro-phonics. Exact frequency mode with 24-bit fractional modulator provides the ability to generate fractional frequencies with zero frequency error, an important feature for Digital Pre-Distortion systems. The serial interface offers read back capability and is compatible with a wide variety of protocols. Rochester Electronics has partnered with Analog Devices to offer continuity of supply for this product which has now become EOL at Analog Devices. Please contact adirf@rocelec.com for ordering support for this EOL product. Applications Microwave Point-to-Point Radios Base Stations for Mobile Radio (GSM, PCS, DCS, CDMA, WCDMA) Wireless LANs, WiMAX Communications Test Equipment CATV Equipment Automotive

The ADF4001 frequency synthesizer can be used to implement clock sources for PLLs that require very low noise, stable reference signals. It consists of a low-noise digital PFD (Phase Frequency Detector), a precision charge pump, a programmable reference divider, and a programmable 13-bit N counter. In addition, the 14-bit reference counter (R Counter), allows selectable REFIN frequencies at the PFD input. A complete PLL (Phase-Locked Loop) can be implemented if the synthesizer is used with an external loop filter and VCO (Voltage Controlled Oscillator) or VCXO (Voltage Controlled Crystal Oscillator). The N min value of 1 allows flexibility in clock generation.

The LMK0482x family is the industry’s highest performance clock conditioner with JEDEC JESD204B support. The 14 clock outputs from PLL2 can be configured to drive seven JESD204B converters or other logic devices, using device and SYSREF clocks. SYSREF can be provided using both DC and AC coupling. Not limited to JESD204B applications, each of the 14 outputs can be individually configured as high-performance outputs for traditional clocking systems. The high performance, combined with features such as the ability to trade off between power or performance, dual VCOs, dynamic digital delay, holdover, and glitchless analog delay, make the LMK0482x family ideal for providing flexible high-performance clocking trees.